Japanese Laid-Open Patent Publication No. 2007-188528 describes a dynamically-reconfigurable semiconductor integrated circuit, such as an LSI, that permits dynamic reconfiguration and switching of a circuit configuration as appropriate (hereinafter a “reconfigurable circuit”). One way to realize a reconfigurable circuit is to use a multi-context type circuit.
A reconfigurable circuit of multi-context type has circuit types with certain functions (hereinafter “processing elements” or “PEs”). Such a reconfigurable circuit realizes wired logic by expanding circuit configuration information (hereinafter “context” (plane)) that defines operations of various types of processing elements and connection relations on an LSI, and operates by temporally switching contexts while virtualizing hardware resources.
A functional circuit realized in such a manner must operate in units of contexts and within limitations on the number of switchable contexts. However, settings such as a trigger to switch to another context or the number of processing elements to assign to each context affect performance and efficiency of virtualization.
Data to be processed by a functional circuit in a context is stored in a storage element, such as a register file or internal memory (internal RAM), and data movement between contexts is made via a storage element. Therefore, what is executed in a certain context does not have to be one meaningful task of all functional circuits, and contexts are also used for executing a single large task in a time division multiplex method. Virtualization means that, in context switching in FIG. 18, for example, Context #0 (1800) and Context #1 (1801) are executed while being alternately reconfigured to virtually realize such a functional circuit (or a task) 1900 as shown in FIG. 19.
Control of context switching includes a wide range of functions, such as specifying operations of each processing element, and detecting control relating to information on connection between processing elements or a trigger for switching, i.e., how many cycles to execute, or detecting the termination of context execution. A reconfigurable circuit accordingly requires a control mechanism (hereinafter a “sequencer”), and a dynamic element can be given to a context through the sequencer. The number of context planes that can be executed is commensurate with the reconfiguration memory: when the reconfiguration memory has information equivalent to “n” planes, the maximum number of switchable contexts is “n” planes.